AD9851 DATASHEET PDF

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When referenced to an accurate clock source, the AD generates a stable frequency and phase-programmable digitized analog output sine wave. This sine wave can be used directly as a frequency source, or internally converted to a square wave for agile-clock generator applications. The AD provides five bits of programmable phase modulation resolution to enable phase shifting of its output in increments of The AD contains an internal high speed comparator that can be configured to accept the externally filtered output of the DAC to generate a low jitter output pulse.

The frequency tuning, control, and phase modulation words are asynchronously loaded into the AD via a parallel or serial loading format. The parallel load format consists of five iterative loads of an 8-bit control word byte. Serial loading is accomplished via a bit serial data stream entering through one of the parallel input bus lines. Below 3. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.

No license is granted by implication or oth- erwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P. Box , Norwood, MA , U.

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When referenced to an accurate clock source, the AD generates a stable frequency and phase-programmable digitized analog output sine wave. This sine wave can be used directly as a frequency source, or internally converted to a square wave for agile-clock generator applications. The AD provides five bits of programmable phase modulation resolution to enable phase shifting of its output in increments of The AD contains an internal high speed comparator that can be configured to accept the externally filtered output of the DAC to generate a low jitter output pulse. The frequency tuning, control, and phase modulation words are asynchronously loaded into the AD via a parallel or serial loading format. The parallel load format consists of five iterative loads of an 8-bit control word byte.

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We use a crystal oscillator of MHz and do not use the internal multiplier in order to increase noise performance. For the crystal oscillator a separate voltage regulator is available, in order to generate different voltages necessary for different oscillator types. We therefore decided to try to get away with an opamp. We have chosen the THSD from Texas, as it was in the treasure box :- Beyond that, nothing special, we follow the reference design from Analog Devices.

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